There are two basic techniques used in digital-to-analog converters (DACs). These are the sigma-delta technique and the resistive or capacitive divider techniques. The sigma-delta technique is attractive because it achieves high resolution by precise timing instead of precisely-matched on-chip components such as resistors. In addition, the expertise needed to produce thin-film, laser-trimmed analog components is difficult to obtain; whereas, high-speed digital switching capability is commonplace in the semiconductor industry.
A basic sigma-delta DAC receives a digital input signal which is summed with inverse feedback of the output signal to provide an error signal. The error signal is then processed through an integrator and a comparator to provide the analog output signal. The sigma-delta DAC is able to shape the quantization noise out of the audio signal range, and any noise beyond that range is imperceptible to the listener in an ideal implementation. The output of an ideal sigma-delta modulator can thus be used as the DAC analog output signal.
However, added filtering is required for non-ideal following amplifier stages because the out-of-band noise tends to intermodulate back into the passband. Sigma-delta modulators often require oversampled data which would be provided by an interpolator. The DAC's input data may be at the Nyquist rate or may require interpolation to a higher rate before being provided to the sigma-delta modulator. The sigma-delta modulator is clocked using a high-speed digital clock, which may be different from the DAC's input clock. In general, noise present near multiples of these clock frequencies does not affect the analog output signal, because these frequencies are well beyond the passband of the signal of interest. However, this noise has a tendency to intermodulate back into the passband when nonlinearities, such as rise- and fall-time mismatch of the modulator output, are present. For example, a modulator based on complementary metal-oxide-semiconductor (CMOS) transistor technology has an output driver using both a P-channel and N-channel transistors. The thresholds of these transistors are difficult to match, and there may be differences in speed of the output signal depending on whether the output driver is switching high or low.
The modulator output signal is commonly filtered in an analog smoothing filter, but there are problems with this approach. The analog smoothing filter should have an order at least one greater than that of the modulator and the filter must be complex if it is to reduce aliased outputs. Ironically, the sigma-delta architecture was intended to simplify the implementation of the data converter. What is needed, then, is a sigma-delta DAC architecture with improved signal-to-noise ratio (SNR) and reduced complexity.